353 lines
13 KiB
C
353 lines
13 KiB
C
#include "mxsuperio.h"
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#include "mx.h"
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#include "w83627uhg.h"
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#include "w83791d.h"
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BYTE w83791d_bank = 0x00;
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BYTE w83791d_config = W83791D_CONFIG_START;
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BYTE w83791d_noncrit_t1 = 75; // C
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BYTE w83791d_crit_t1 = 80; // C
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BYTE w83791d_noncrit_t2 = 75; // C
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BYTE w83791d_crit_t2 = 80; // C
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BYTE w83791d_noncrit_t3 = 75; // C
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BYTE w83791d_crit_t3 = 80; // C
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BYTE w83791d_vbat_monitor_control = 0x00;
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BOOL w83791d_4f_high = 0;
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BYTE w83627uhg_fanconf = 0x01;
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BYTE w83627uhg_fanconf_2 = 0x00;
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BYTE w83627uhg_cpufanout_src_slct = 0x2d;
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BYTE w83627uhg_sysfanout_src_slct = 0x00;
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BYTE w83627uhg_systin_target = 0x00;
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BYTE w83627uhg_cputin_target = 0x00;
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BYTE w83627uhg_target_tolerance = 0x00;
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// Configuration 0: Logical address 2E
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// Configuration 1: Logical address 4E
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// Neither of these values are needed because we aren't talking to a real chip!
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#define LPC_CONFIGURATION 1
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BYTE hwmon_read(superio_packet* packet) {
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BYTE index = packet->index;
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BYTE reg = packet->reg;
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switch (w83791d_bank) {
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case 0x00: {
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switch (reg) {
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case W83627UHG_REG_FAN_CONF:
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return w83627uhg_fanconf;
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case W83627UHG_REG_FAN_CONF_2:
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return w83627uhg_fanconf_2;
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case W83627UHG_REG_CPUFANOUT_TEMP_SRC_SLCT:
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return w83627uhg_cpufanout_src_slct;
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case W83627UHG_REG_SYSFANOUT_TEMP_SRC_SLCT:
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return w83627uhg_sysfanout_src_slct;
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case W83627UHG_REG_SYSTIN_TARGET_TEMP:
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return w83627uhg_systin_target;
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case W83627UHG_REG_CPUTIN_TARGET_TEMP:
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return w83627uhg_cputin_target;
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case W83627UHG_REG_TARGET_TEMP_TOLERANCE:
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return w83627uhg_target_tolerance;
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case W83791D_REG_WCHIPID:
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return 0x71; // Observed: c1
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case W83791D_REG_CHIPMAN:
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if (w83791d_4f_high)
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return 0x5c; // High byte
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else
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return 0xa3; // Low byte
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case W83791D_REG_I2C_ADDR:
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return 0x11; // Observed: 2d
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case W83791D_REG_BANK:
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return w83791d_bank;
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case W83791D_REG_CONFIG:
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return w83791d_config;
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case W83791D_REG_BEEP_CTRL_0:
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// No beeping :(
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return 0x00;
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// TODO: No idea how to read any of these. Pulled from real system
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case W83791D_REG_TEMP1_0:
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return 26; // Chasis temp
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case W83791D_RAM_VCOREA:
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return 0x76;
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case W83791D_RAM_VNIR0:
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return 0x86;
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case W83791D_RAM_VDD5:
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return 0x94;
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case W83791D_RAM_12VIN:
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return 0xbe;
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case W83791D_RAM_N12VIN:
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return 0xd1;
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case W83791D_RAM_FAN1:
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case W83791D_RAM_FAN2:
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case W83791D_RAM_FAN3:
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return 0x00; // Fan no spinny!
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case W83791D_VID_FAN_DIV:
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// Boths fans divide by 2 (01)
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return 0b00000101;
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case W83791D_VBAT_MONITOR_CONTROL:
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return w83791d_vbat_monitor_control;
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default:
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log_error(plfMxSuperio, "Unknown HM b0 register: read 0x%02x", reg);
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return 0xff;
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}
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} break;
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case 0x01: {
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switch (reg) {
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case W83791D_REG_BANK:
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return w83791d_bank;
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case W83791D_NONCRIT_TEMP_1:
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return w83791d_noncrit_t1;
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case W83791D_CRIT_TEMP_1:
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return w83791d_crit_t1;
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case W83791D_NONCRIT_TEMP_2:
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return w83791d_noncrit_t2;
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case W83791D_CRIT_TEMP_2:
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return w83791d_crit_t2;
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case W83791D_NONCRIT_TEMP_3:
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return w83791d_noncrit_t3;
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case W83791D_CRIT_TEMP_3:
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return w83791d_crit_t3;
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// TODO: Figure out what's going on with this discrepency!
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case 0x50:
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return 35; // CPU temp
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// case W83791D_VIN0:
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// return W83791D_ENTITY_CPU;
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case W83791D_VIN1:
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return W83791D_ENTITY_SYSTEM;
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default:
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log_error(plfMxSuperio, "Unknown HM b1 register: 0x%02x", reg);
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exit(1);
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}
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} break;
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case 0x05: {
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switch (reg) {
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case W83791D_REG_BANK:
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return w83791d_bank;
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// Used in amHmReadVoltageInternal
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// What are these??
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case 0x51:
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case 0x40:
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return 0xff;
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default:
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log_error(plfMxSuperio, "Unknown HM b5 register: 0x%02x", reg);
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return 0xff;
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}
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} break;
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default:
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log_error(plfMxSuperio, "Unknown HM bank: 0x%02x", w83791d_bank);
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exit(1);
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}
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}
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void hwmon_write(superio_packet* packet) {
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switch (w83791d_bank) {
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case 0x00: {
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switch (packet->reg) {
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case W83627UHG_REG_FAN_CONF:
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w83627uhg_fanconf = packet->data;
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break;
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case W83627UHG_REG_FAN_CONF_2:
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w83627uhg_fanconf_2 = packet->data;
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break;
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case W83627UHG_REG_CPUFANOUT_VALUE_SELECT:
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// Just no-op this
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break;
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case W83627UHG_REG_CPUFANOUT_TEMP_SRC_SLCT:
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w83627uhg_cpufanout_src_slct = packet->data;
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break;
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case W83627UHG_REG_SYSFANOUT_TEMP_SRC_SLCT:
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w83627uhg_sysfanout_src_slct = packet->data;
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break;
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case W83627UHG_REG_SYSTIN_TARGET_TEMP:
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w83627uhg_systin_target = packet->data;
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break;
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case W83627UHG_REG_CPUTIN_TARGET_TEMP:
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w83627uhg_cputin_target = packet->data;
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break;
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case W83627UHG_REG_TARGET_TEMP_TOLERANCE:
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w83627uhg_target_tolerance = packet->data;
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break;
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case W83627UHG_REG_SYSFANOUT_STOP_VALUE:
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case W83627UHG_REG_SYSFANOUT_START_VALUE:
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break;
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case W83791D_REG_BEEP_CTRL_0:
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// Ignore for now
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break;
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case W83791D_REG_BANK:
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w83791d_4f_high = !!(packet->data & 0x80);
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w83791d_bank = packet->data & 7;
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break;
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case W83791D_REG_CONFIG:
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w83791d_config = packet->data;
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break;
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case W83791D_VBAT_MONITOR_CONTROL:
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w83791d_vbat_monitor_control = packet->data;
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break;
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default:
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log_error(plfMxSuperio, "Unknown HM b0 register: write 0x%02x", packet->reg);
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// exit(1);
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}
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break;
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}
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case 0x01: {
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switch (packet->reg) {
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case W83791D_REG_BANK:
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w83791d_4f_high = !!(packet->data & 0x80);
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w83791d_bank = packet->data & 7;
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break;
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case W83791D_NONCRIT_TEMP_1:
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w83791d_noncrit_t1 = packet->data;
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break;
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case W83791D_CRIT_TEMP_1:
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w83791d_crit_t1 = packet->data;
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break;
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case W83791D_NONCRIT_TEMP_2:
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w83791d_noncrit_t2 = packet->data;
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break;
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case W83791D_CRIT_TEMP_2:
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w83791d_crit_t2 = packet->data;
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break;
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case W83791D_NONCRIT_TEMP_3:
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w83791d_noncrit_t3 = packet->data;
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break;
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case W83791D_CRIT_TEMP_3:
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w83791d_crit_t3 = packet->data;
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break;
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default:
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log_error(plfMxSuperio, "Unknown HM b1 register: 0x%02x", packet->reg);
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exit(1);
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}
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} break;
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case 0x05: {
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switch (packet->reg) {
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case W83791D_REG_BANK:
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w83791d_4f_high = !!(packet->data & 0x80);
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w83791d_bank = packet->data & 7;
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break;
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// Used in amHmReadVoltageInternal
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// What is this??
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case 0x40:
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break;
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default:
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log_error(plfMxSuperio, "Unknown HM b5 register: 0x%02x", packet->reg);
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return;
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}
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} break;
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default:
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log_error(plfMxSuperio, "Unknown HM bank: 0x%02x", w83791d_bank);
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exit(1);
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}
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}
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BOOL WINAPI mxsuperio_DeviceIoControl(file_context_t* ctx, DWORD dwIoControlCode, LPVOID lpInBuffer,
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DWORD nInBufferSize, LPVOID lpOutBuffer, DWORD nOutBufferSize,
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LPDWORD lpBytesReturned, LPOVERLAPPED lpOverlapped) {
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superio_packet* lpc_packet = (superio_packet*)lpInBuffer;
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superio_packet* lpc_out = (superio_packet*)lpOutBuffer;
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switch (dwIoControlCode) {
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case IOCTL_MXSUPERIO_PING: {
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((LPDWORD)lpOutBuffer)[0] = 0x01000001;
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if (lpBytesReturned) *lpBytesReturned = 4;
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break;
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}
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case IOCTL_MXSUPERIO_READ: {
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superio_lpc_packet* packet = (superio_lpc_packet*)(lpInBuffer);
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if (lpBytesReturned) *lpBytesReturned = sizeof *packet;
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packet->data = 0xff;
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if (packet->chip != LPC_CONFIGURATION) goto W83627UHG_processed;
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// TODO: Is just emulating the chip ID enough?
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// Global registers
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switch (packet->reg) {
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case 0x20: // Chip ID MSB
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packet->data = 0xa2;
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goto W83627UHG_processed;
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case 0x21: // Chip ID LSB
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packet->data = 0x32;
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goto W83627UHG_processed;
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}
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// Device specific registers
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switch (packet->device) {
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//
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}
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W83627UHG_processed:
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log_misc(plfMxSuperio, "read: chip:%d device:%d reg:%02x data:%02x", packet->chip,
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packet->device, packet->reg, packet->data);
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break;
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}
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case IOCTL_MXSUPERIO_WRITE: {
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superio_lpc_packet* packet = (superio_lpc_packet*)(lpInBuffer);
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if (lpBytesReturned) *lpBytesReturned = sizeof *packet;
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log_misc(plfMxSuperio, "write: chip:%d device:%d reg:%02x data:%02x", packet->chip,
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packet->device, packet->reg, packet->data);
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// TODO: Are there any writes we need to process?
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break;
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}
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case IOCTL_MXSUPERIO_HWMONITOR_LPC_READ: {
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// TODO: This code is all for W83791D, however W83627UHG is more appropriate in some
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// cases. Is this an AAL vs AAM difference? Where was the W83791D usage derived from?
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// reg 0x48 = LPC Chip ID
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// index = 0,1
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// data > 0x0f, data < 0x70
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if (lpc_packet->index == LPC_CONFIGURATION) {
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lpc_out->data = hwmon_read(lpc_packet);
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} else {
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lpc_out->data = 0xff;
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}
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log_misc(plfMxSuperio, "amHmLpcReadByte Index=0x%02x Reg=0x%02x Data=0x%02x",
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lpc_packet->index, lpc_packet->reg, lpc_out->data);
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if (lpBytesReturned) *lpBytesReturned = sizeof *lpc_out;
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} break;
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case IOCTL_MXSUPERIO_HWMONITOR_LPC_WRITE: {
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log_misc(plfMxSuperio, "amHmLpcWriteByte Index=0x%02x Reg=0x%02x Data=0x%02b",
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lpc_packet->index, lpc_packet->reg, lpc_packet->data);
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if (lpc_packet->index == LPC_CONFIGURATION) {
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hwmon_write(lpc_packet);
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}
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if (lpBytesReturned) *lpBytesReturned = 0;
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} break;
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default:
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log_warning(plfMxSuperio, "unhandled 0x%08x", dwIoControlCode);
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return FALSE;
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}
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return TRUE;
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}
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void setup_mxsuperio() {
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file_hook_t* mxsuperio = new_file_hook(L"\\\\.\\mxsuperio");
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mxsuperio->DeviceIoControl = &mxsuperio_DeviceIoControl;
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hook_file(mxsuperio);
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}
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