144 lines
4.4 KiB
C
144 lines
4.4 KiB
C
// W83791D (H/W monitor)
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// https://elixir.bootlin.com/linux/latest/source/drivers/hwmon/w83791d.c
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// https://datasheetspdf.com/pdf-file/641504/Winbond/W83791D/1
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// Bank 0
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#define W83791D_REG_BANK 0x4E
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#define W83791D_REG_TEMP2_CONFIG 0xC2
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#define W83791D_REG_TEMP3_CONFIG 0xCA
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#define W83791D_REG_TEMP1_0 0x27
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#define W83791D_REG_TEMP1_1 0x39
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#define W83791D_REG_TEMP1_2 0x3A
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#define W83791D_REG_BEEP_CONFIG 0x4D
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#define W83791D_REG_BEEP_CTRL_0 0x56
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#define W83791D_REG_BEEP_CTRL_1 0x57
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#define W83791D_REG_BEEP_CTRL_2 0xA3
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#define W83791D_REG_GPIO 0x15
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#define W83791D_REG_CONFIG 0x40
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#define W83791D_REG_VID_FANDIV 0x47
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#define W83791D_REG_DID_VID4 0x49
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#define W83791D_REG_WCHIPID 0x58
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#define W83791D_REG_CHIPMAN 0x4F //
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#define W83791D_REG_PIN 0x4B
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#define W83791D_REG_I2C_SUBADDR 0x4A
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#define W83791D_REG_ALARM1 0xA9
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#define W83791D_REG_ALARM2 0xAA
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#define W83791D_REG_ALARM3 0xAB
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#define W83791D_REG_VBAT 0x5D
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#define W83791D_REG_I2C_ADDR 0x48 // Used
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#define W83791D_RAM_VCOREA 0x20
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#define W83791D_RAM_VNIR0 0x21
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#define W83791D_RAM_3V3 0x22
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#define W83791D_RAM_VDD5 0x23
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#define W83791D_RAM_12VIN 0x24
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#define W83791D_RAM_N12VIN 0x25
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#define W83791D_RAM_N5VIN 0x26
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#define W83791D_RAM_TEMP 0x27
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#define W83791D_RAM_FAN1 0x28
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#define W83791D_RAM_FAN2 0x29
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#define W83791D_RAM_FAN3 0x2a
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#define W83791D_RAM_VCOREA_HIGH 0x2b
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#define W83791D_RAM_VCOREA_LOW 0x2c
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#define W83791D_RAM_VINR0_HIGH 0x2d
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#define W83791D_RAM_VINR0_LOW 0x2e
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#define W83791D_RAM_3V3_HIGH 0x2f
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#define W83791D_RAM_3V3_LOW 0x30
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#define W83791D_RAM_VDD5_HIGH 0x31
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#define W83791D_RAM_VDD5_LOW 0x32
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#define W83791D_RAM_12VIN_HIGH 0x33
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#define W83791D_RAM_12VIN_LOW 0x34
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#define W83791D_RAM_N12VIN_HIGH 0x35
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#define W83791D_RAM_N12VIN_LOW 0x36
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#define W83791D_RAM_N5VIN_HIGH 0x37
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#define W83791D_RAM_N5VIN_LOW 0x38
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#define W83791D_RAM_VTIN1_HIGH 0x39
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#define W83791D_RAM_VTIN1_HYST 0x3a
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#define W83791D_RAM_FAN1_LIMIT 0x3b
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#define W83791D_RAM_FAN2_LIMIT 0x3c
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#define W83791D_RAM_FAN3_LIMIT 0x3d
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#define W83791D_VID_FAN_DIV 0x47
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#define W83791D_VBAT_MONITOR_CONTROL 0x5d
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// Beep flags
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#define W83791D_BEEP0_EN_FAN2 0x80
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#define W83791D_BEEP0_EN_FAN1 0x40
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#define W83791D_BEEP0_EN_T2 0x20
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#define W83791D_BEEP0_EN_T1 0x10
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#define W83791D_BEEP0_EN_V5 0x08
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#define W83791D_BEEP0_EN_V33 0x04
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#define W83791D_BEEP0_EN_T3 0x02
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#define W83791D_BEEP0_EN_V25A 0x01
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#define W83791D_BEEP1_EN_G 0x80
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#define W83791D_BEEP1_EN_VR1 0x40
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#define W83791D_BEEP1_EN_VR0 0x20
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#define W83791D_BEEP1_EN_CASO 0x10
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#define W83791D_BEEP1_EN_FAN3 0x08
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#define W83791D_BEEP1_EN_NV5 0x04
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#define W83791D_BEEP1_EN_NV12 0x02
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#define W83791D_BEEP1_EN_V13 0x01
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#define W83791D_BEEP2_EN_USER 0x80
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#define W83791D_BEEP2_EN_FAN5 0x40
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#define W83791D_BEEP2_EN_FAN4 0x20
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#define W83791D_BEEP2_EN_TART3 0x10
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#define W83791D_BEEP2_EN_TART2 0x08
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#define W83791D_BEEP2_EN_TART1 0x04
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#define W83791D_BEEP2_EN_VBAT 0x02
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#define W83791D_BEEP2_EN_VSB 0x01
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// Config flags
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#define W83791D_CONFIG_INIT 0x80
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#define W83791D_CONFIG_IRQ_OUT 0x40
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#define W83791D_CONFIG_IRQ_POL 0x40
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#define W83791D_CONFIG_RESERVED 0x10
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#define W83791D_CONFIG_INT_CLEAR 0x08
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#define W83791D_CONFIG_IRQ_EN 0x04
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#define W83791D_CONFIG_SMI_EN 0x02
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#define W83791D_CONFIG_START 0x01
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// VBAT monitor control
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#define W83791D_VBMC_FANDIV3 0x80
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#define W83791D_VBMC_FANDIV2 0x40
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#define W83791D_VBMC_FANDIV1 0x20
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#define W83791D_VBMC_EN_ALM_RSP 0x10
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#define W83791D_VBMC_BJTS3 0x08
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#define W83791D_VBMC_BJTS2 0x04
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#define W83791D_VBMC_BJTS1 0x02
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#define W83791D_VBMC_EN_VBAT_MINT 0x01
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// Bank 1
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#define W83791D_NONCRIT_TEMP_1 0x40
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#define W83791D_CRIT_TEMP_1 0x41
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#define W83791D_NONCRIT_TEMP_2 0x42
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#define W83791D_CRIT_TEMP_2 0x43
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#define W83791D_NONCRIT_TEMP_3 0x44
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#define W83791D_CRIT_TEMP_3 0x45
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#define W83791D_SENSOR_SBMUS_ADDRESS 0x4F
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#define W83791D_VIN0 0x50 // VCORE
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#define W83791D_VIN1 0x51 // VINR0
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#define W83791D_VIN2 0x52 // +3.3 VIN
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#define W83791D_VIN3 0x53 // +5 VIN
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#define W83791D_VIN4 0x54 // +12 VIN
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#define W83791D_VIN5 0x55 // -12 VIN
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#define W83791D_VIN6 0x56 // -5 VIN
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#define W83791D_VSB 0x57
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#define W83791D_VBAT 0x58
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#define W83791D_VINR1 0x59
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#define W83791D_FAN1 0x5a
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#define W83791D_FAN2 0x5b
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#define W83791D_FAN3 0x5c
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#define W83791D_TEMP1 0x5d
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#define W83791D_TEMP2 0x5e
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#define W83791D_TEMP3 0x5f
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#define W83791D_CHASIS 0x50
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#define W83791D_ENTITY_CPU 0x03
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#define W83791D_ENTITY_SYSTEM 0x07
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#define W83791D_ENTITY_MEMORY_MOD 0x08
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#define W83791D_ENTITY_CHASIS 0x17
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#define W83791D_ENTITY_FAN 0x1d
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#define W83791D_ENTITY_MEMORY_DEV 0x20
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