200 lines
7.7 KiB
C
200 lines
7.7 KiB
C
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/**************************************************************************//**
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* @file PDMA.h
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* @version V1.00
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* $Revision: 6 $
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* $Date: 15/07/02 11:21a $
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* @brief NUC123 Series PDMA Controller Driver Header File
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*
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* @note
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* SPDX-License-Identifier: Apache-2.0
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* Copyright (C) 2014~2015 Nuvoton Technology Corp. All rights reserved.
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*
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******************************************************************************/
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#ifndef __PDMA_H__
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#define __PDMA_H__
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#include "NUC123.h"
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/** @addtogroup Standard_Driver Standard Driver
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* @{
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*/
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/** @addtogroup PDMA_Driver PDMA Driver
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* @{
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*/
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/** @addtogroup PDMA_EXPORTED_CONSTANTS PDMA Exported Constants
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@{
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*/
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/*---------------------------------------------------------------------------------------------------------*/
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/* Data Width Constant Definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define PDMA_WIDTH_8 0x00080000UL /*!<DMA Transfer Width 8-bit */
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#define PDMA_WIDTH_16 0x00100000UL /*!<DMA Transfer Width 16-bit */
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#define PDMA_WIDTH_32 0x00000000UL /*!<DMA Transfer Width 32-bit */
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/*---------------------------------------------------------------------------------------------------------*/
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/* Address Attribute Constant Definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define PDMA_SAR_INC 0x00000000UL /*!<DMA SAR increment */
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#define PDMA_SAR_FIX 0x00000020UL /*!<DMA SAR fix address */
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#define PDMA_DAR_INC 0x00000000UL /*!<DMA DAR increment */
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#define PDMA_DAR_FIX 0x00000080UL /*!<DMA DAR fix address */
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/*---------------------------------------------------------------------------------------------------------*/
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/* Peripheral Transfer Mode Constant Definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define PDMA_SPI0_TX 0x00000000UL /*!<DMA Connect to SPI0 TX */
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#define PDMA_SPI1_TX 0x00000001UL /*!<DMA Connect to SPI1 TX */
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#define PDMA_SPI2_TX 0x00000002UL /*!<DMA Connect to SPI2 TX */
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#define PDMA_UART0_TX 0x00000003UL /*!<DMA Connect to UART0 TX */
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#define PDMA_UART1_TX 0x00000004UL /*!<DMA Connect to UART1 TX */
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#define PDMA_I2S_TX 0x00000005UL /*!<DMA Connect to I2S TX */
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#define PDMA_SPI0_RX 0x00000006UL /*!<DMA Connect to SPI0 RX */
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#define PDMA_SPI1_RX 0x00000007UL /*!<DMA Connect to SPI1 RX */
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#define PDMA_SPI2_RX 0x00000008UL /*!<DMA Connect to SPI2 RX */
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#define PDMA_UART0_RX 0x00000009UL /*!<DMA Connect to UART0 RX */
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#define PDMA_UART1_RX 0x0000000AUL /*!<DMA Connect to UART1 RX */
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#define PDMA_I2S_RX 0x0000000BUL /*!<DMA Connect to I2S RX */
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#define PDMA_ADC 0x0000000CUL /*!<DMA Connect to ADC */
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#define PDMA_PWM0_RX 0x0000000DUL /*!<DMA Connect to PWM0 RX */
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#define PDMA_PWM1_RX 0x0000000EUL /*!<DMA Connect to PWM1 RX */
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#define PDMA_PWM2_RX 0x0000000FUL /*!<DMA Connect to PWM2 RX */
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#define PDMA_PWM3_RX 0x00000010UL /*!<DMA Connect to PWM3 RX */
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#define PDMA_MEM 0x0000001FUL /*!<DMA Connect to Memory */
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/*@}*/ /* end of group PDMA_EXPORTED_CONSTANTS */
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/** @addtogroup PDMA_EXPORTED_FUNCTIONS PDMA Exported Functions
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@{
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*/
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/**
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* @brief Get PDMA Global Interrupt Status
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*
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* @param None
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*
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* @return Interrupt Status
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*
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* @details This macro gets the global interrupt status.
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*/
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#define PDMA_GET_INT_STATUS() ((uint32_t)(PDMA_GCR->GCRISR))
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/**
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* @brief Get PDMA Channel Interrupt Status
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*
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* @param[in] u32Ch Selected DMA channel
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*
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* @return Interrupt Status
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*
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* @details This macro gets the channel interrupt status.
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*/
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#define PDMA_GET_CH_INT_STS(u32Ch) (*((__IO uint32_t *)((uint32_t)&PDMA0->ISR + (uint32_t)((u32Ch)*0x100))))
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/**
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* @brief Clear PDMA Channel Interrupt Flag
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*
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* @param[in] u32Ch Selected DMA channel
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* @param[in] u32Mask Interrupt Mask
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*
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* @return None
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*
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* @details This macro clear the channel interrupt flag.
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*/
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#define PDMA_CLR_CH_INT_FLAG(u32Ch, u32Mask) (*((__IO uint32_t *)((uint32_t)&PDMA0->ISR + (uint32_t)((u32Ch)*0x100))) = (u32Mask))
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/**
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* @brief Check Channel Status
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*
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* @param[in] u32Ch The selected channel
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*
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* @retval 0 The selected channel is idle
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* @retval 1 The selected channel is busy
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*
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* @details Check the selected channel is busy or not.
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*/
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#define PDMA_IS_CH_BUSY(u32Ch) ((*((__IO uint32_t *)((uint32_t)&PDMA0->CSR +(uint32_t)((u32Ch)*0x100)))&PDMA_CSR_TRIG_EN_Msk)? 1 : 0)
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/**
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* @brief Set Source Address
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*
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* @param[in] u32Ch The selected channel
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* @param[in] u32Addr The selected address
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*
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* @return None
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*
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* @details This macro set the selected channel source address.
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*/
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#define PDMA_SET_SRC_ADDR(u32Ch, u32Addr) (*((__IO uint32_t *)((uint32_t)&PDMA0->SAR + (uint32_t)((u32Ch)*0x100))) = (u32Addr))
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/**
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* @brief Set Destination Address
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*
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* @param[in] u32Ch The selected channel
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* @param[in] u32Addr The selected address
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*
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* @return None
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*
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* @details This macro set the selected channel destination address.
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*/
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#define PDMA_SET_DST_ADDR(u32Ch, u32Addr) (*((__IO uint32_t *)((uint32_t)&PDMA0->DAR + (uint32_t)((u32Ch)*0x100))) = (u32Addr))
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/**
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* @brief Set Transfer Count
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*
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* @param[in] u32Ch The selected channel
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* @param[in] u32Count Transfer Count
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*
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* @return None
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*
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* @details This macro set the selected channel transfer count.
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* \hideinitializer
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*/
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#define PDMA_SET_TRANS_CNT(u32Ch, u32Count) { \
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if (((uint32_t)*((__IO uint32_t *)((uint32_t)&PDMA0->CSR + (uint32_t)((u32Ch)*0x100))) & PDMA_CSR_APB_TWS_Msk) == PDMA_WIDTH_32) \
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*((__IO uint32_t *)((uint32_t)&PDMA0->BCR + (uint32_t)((u32Ch)*0x100))) = ((u32Count) << 2); \
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else if (((uint32_t)*((__IO uint32_t *)((uint32_t)&PDMA0->CSR + (uint32_t)((u32Ch)*0x100))) & PDMA_CSR_APB_TWS_Msk) == PDMA_WIDTH_8) \
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*((__IO uint32_t *)((uint32_t)&PDMA0->BCR + (uint32_t)((u32Ch)*0x100))) = (u32Count); \
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else if (((uint32_t)*((__IO uint32_t *)((uint32_t)&PDMA0->CSR + (uint32_t)((u32Ch)*0x100))) & PDMA_CSR_APB_TWS_Msk) == PDMA_WIDTH_16) \
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*((__IO uint32_t *)((uint32_t)&PDMA0->BCR + (uint32_t)((u32Ch)*0x100))) = ((u32Count) << 1); \
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}
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/**
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* @brief Stop the channel
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*
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* @param[in] u32Ch The selected channel
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*
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* @return None
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*
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* @details This macro stop the selected channel.
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*/
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#define PDMA_STOP(u32Ch) (*((__IO uint32_t *)((uint32_t)&PDMA0->CSR + (uint32_t)((u32Ch)*0x100))) &= ~PDMA_CSR_PDMACEN_Msk)
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void PDMA_Open(uint32_t u32Mask);
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void PDMA_Close(void);
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void PDMA_SetTransferCnt(uint32_t u32Ch, uint32_t u32Width, uint32_t u32TransCount);
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void PDMA_SetTransferAddr(uint32_t u32Ch, uint32_t u32SrcAddr, uint32_t u32SrcCtrl, uint32_t u32DstAddr, uint32_t u32DstCtrl);
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void PDMA_SetTransferMode(uint32_t u32Ch, uint32_t u32Periphral, uint32_t u32ScatterEn, uint32_t u32DescAddr);
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void PDMA_Trigger(uint32_t u32Ch);
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void PDMA_EnableInt(uint32_t u32Ch, uint32_t u32Mask);
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void PDMA_DisableInt(uint32_t u32Ch, uint32_t u32Mask);
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/**
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* @} End of PDMA Device Function Interface
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*/
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/**
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* @} End of Function Interface
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*/
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/**
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* @} End of PDMA_Driver
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*/
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#endif // __PDMA_H__
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