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/**************************************************************************//**
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* @file system_NUC123.c
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* @version V3.0
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* $Revision: 5 $
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* $Date: 15/07/02 11:21a $
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* @brief NUC123 Series CMSIS System File
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*
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* @note
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* SPDX-License-Identifier: Apache-2.0
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* Copyright (C) 2014~2015 Nuvoton Technology Corp. All rights reserved.
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*
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******************************************************************************/
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#include <stdint.h>
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#include "NUC123.h"
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/*----------------------------------------------------------------------------
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Clock Variable definitions
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*----------------------------------------------------------------------------*/
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uint32_t SystemCoreClock = __HSI; /*!< System Clock Frequency (Core Clock) */
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uint32_t CyclesPerUs = (__HSI / 1000000); /* Cycles per micro second */
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uint32_t PllClock = __HSI; /*!< PLL Output Clock Frequency */
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uint32_t gau32ClkSrcTbl[] = { __HXT, NULL, __HSI, __LIRC, NULL, NULL, NULL, __HIRC };
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/*----------------------------------------------------------------------------
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Clock functions
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This function is used to update the variable SystemCoreClock
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and must be called whenever the core clock is changed.
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*----------------------------------------------------------------------------*/
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void SystemCoreClockUpdate(void) /* Get Core Clock Frequency */
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{
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uint32_t u32Freq, u32ClkSrc;
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uint32_t u32HclkDiv;
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/* Update PLL Clock */
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PllClock = CLK_GetPLLClockFreq();
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u32ClkSrc = CLK->CLKSEL0 & CLK_CLKSEL0_HCLK_S_Msk;
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if (u32ClkSrc == CLK_CLKSEL0_HCLK_S_PLL) {
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/* Use PLL clock */
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u32Freq = PllClock;
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} else if (u32ClkSrc == CLK_CLKSEL0_HCLK_S_PLL_DIV2) {
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/* Use PLL/2 clock */
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u32Freq = PllClock >> 1;
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} else {
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/* Use the clock sources directly */
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u32Freq = gau32ClkSrcTbl[u32ClkSrc];
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}
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u32HclkDiv = (CLK->CLKDIV & CLK_CLKDIV_HCLK_N_Msk) + 1;
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/* Update System Core Clock */
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SystemCoreClock = u32Freq / u32HclkDiv;
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CyclesPerUs = (SystemCoreClock + 500000) / 1000000;
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}
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